Date: Thu, 01 Jan 2026 14:23:55 -0300
On Thursday, 1 January 2026 13:09:55 Brasilia Standard Time Jonathan Wakely
via Std-Proposals wrote:
> >> Intel: All Intel x86_64 CPUs include CMPXCHG16B
> >
> > Nocona doesn't, as far as I know
>
> Nor some low-power processors like early Atom models, and apparently modern
> ones including Novalake which is due to launch later in 2026.
Early Atoms and Core, maybe. But the earliest available in the SDE tool
(Saltwell) already does:
$ /opt/intel/sde-external-9.44.0-2024-08-22-lin/sde64 -slt -- cpuid -1l1 |
grep CMPXCHG
CMPXCHG8B inst. = true
CMPXCHG16B instruction = true
And while I have not got my hands on a NVL, I know it will have CX16.
Frederick may have a point if OSes no longer support booting without CX16
(apparently, Windows doesn't). But he's still forgetting the AVX bit for
atomic 128-bit loads.
via Std-Proposals wrote:
> >> Intel: All Intel x86_64 CPUs include CMPXCHG16B
> >
> > Nocona doesn't, as far as I know
>
> Nor some low-power processors like early Atom models, and apparently modern
> ones including Novalake which is due to launch later in 2026.
Early Atoms and Core, maybe. But the earliest available in the SDE tool
(Saltwell) already does:
$ /opt/intel/sde-external-9.44.0-2024-08-22-lin/sde64 -slt -- cpuid -1l1 |
grep CMPXCHG
CMPXCHG8B inst. = true
CMPXCHG16B instruction = true
And while I have not got my hands on a NVL, I know it will have CX16.
Frederick may have a point if OSes no longer support booting without CX16
(apparently, Windows doesn't). But he's still forgetting the AVX bit for
atomic 128-bit loads.
-- Thiago Macieira - thiago (AT) macieira.info - thiago (AT) kde.org Principal Engineer - Intel Data Center - Platform & Sys. Eng.
Received on 2026-01-01 17:24:05
