On Thursday, 27 November 2025 01:38:37 Pacific Standard Time David Brown via
Std-Proposals wrote:
> And a /really/ good
> implementation could have specialisations using SIMD or vector registers
> for different sizes, or fancy multiplication algorithms for larger sizes
> - all while keeping smaller sizes simpler.

SIMD registers don't do additions, subtractions or multiplications across the
entire register. That would be "single data" after all.

One could use a SIMD register to do additions in each lane, and then detect
when carry should have occurred, add 1 to the next lane. My gut feeling is
that the carry implies a sequential operation anyway and cross-lane operations
tend to be slow. This can probably be pipelined, but probably only breaks even
for larger _BitInt (such as over 1024 bits).

-- 
Thiago Macieira - thiago (AT) macieira.info - thiago (AT) kde.org
  Principal Engineer - Intel Data Center - Platform & Sys. Eng.