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Re: [ub] P1407R0: Tell Programmers About Signed Integer Overflow Behavior

From: Jens Maurer <Jens.Maurer_at_[hidden]>
Date: Thu, 31 Jan 2019 01:08:29 +0100
On 01/30/2019 10:05 PM, Hubert Tong wrote:
> On Wed, Jan 30, 2019 at 2:08 PM Scott Schurr <s.scott.schurr_at_[hidden] <mailto:s.scott.schurr_at_[hidden]>> wrote:
> Thanks for pointing that out. Yes, saturation might be considered a desirable behavior, and I believe it's fairly common for floating point. I haven't personally seen hardware- or language-level saturation implemented anywhere for integers. The three Analog Devices DSPs that I have used in the past did not support saturation for integer operations. But that doesn't say anything about TI, Motorola, or other DSP vendors. So integer saturation might be out there in the wild. If anyone is aware of a documented case, that would be great to know about.
> vadd[us][bhw]s on POWER (vector add saturate for various widths of (un)signed integers) is saturating. VADD for ARM NEON has a saturating form and supported integer types.

padd[us][bw] on x86 SSE2 also does saturated addition.

(Sorry, couldn't resist.)


Received on 2019-01-31 01:13:44