On 29 Dec 2025 22:21, Thiago Macieira via Std-Proposals wrote:
> On Monday, 29 December 2025 11:17:33 Brasilia Standard Time Andrey Semashev
> via Std-Proposals wrote:
>>> This is possible but undocumented: all machines capable of AVX have
>>> 128-bit
>>> atomic data paths. Using the VMOVDQA instruction will also have a much
>>> higher performance penalty due to the register file transfers.
>>
>> It is documented in Intel SDM Volume 3, 10.1.1 Guaranteed Atomic Operations.
>
> Thanks. I didn't know it was documented. I'm sure this was done in response to
> compiler people asking for it, because I've seen the discussion in GCC's
> bugzilla.
>
> Also do note the next extension isn't documented: all Intel AVX512-capable
> processors support 256-bit atomic loads and stores.

This may be the case for existing CPUs, but is this guaranteed for
future products? Was there some sort of official commitment to maintain
this guarantee? Especially given that Intel E-cores are going to support
AVX10, which has 512-bit vectors.