On Friday, 5 September 2025 09:40:36 Pacific Daylight Time Jason McKesson via
Std-Proposals wrote:
> I understood that we were discussing some microcontroller architecture
> with direct support for SHA registers and processing. Something that's
> attached to the CPU and thus is effectively a part of the platform, or
> is just a novel processor entirely. Such a platform would have its own
> ABI, and it therefore has the freedom to assign the alignment of
> `_BitInt(384)` whatever it feels is most efficient. It would not be
> expected to be ABI-compatible with other architectures.
>
> That is, we're not talking about slapping some SHA-accelerator card
> into your average PC.

It's highly unlikely that a SHA-384 register would be used for _BitInt in the
first place. Such a specialised register would not be useful for generic
operations.

Moreover, any platform with SHA acceleration is likely going to have low
alignment requirements for the input, because most checksums are at unaligned
content. At worst, it will have typical alignment for large data blocks,
usually the size of the machine's word.

-- 
Thiago Macieira - thiago (AT) macieira.info - thiago (AT) kde.org
  Principal Engineer - Intel Platform & System Engineering