I feel like I'm going around in circles.
I tried to explain this the best I can.
Let's just agree to disagree.

-----Original Message-----
From: Jan Schultke <janschultke_at_googlemail.com>
Sent: Thursday, September 4, 2025 09:09
To: Tiago Freire <tmiguelf_at_[hidden]>
Cc: std-proposals_at_lists.isocpp.org
Subject: Re: [std-proposals] D3666R0 Bit-precise integers

> But you had previously stated that _BitInt(384) doesn't satisfy the alignment requirements to do that.

I don't recall saying any such thing. You're talking about a hypothetical SHA accelerator anyway, so it's never been stated what the expected alignment for loading into such a SHA register would be.
If the requirement is 8 bytes for such a load, then, to take one example, the 8 byte requirement in the x86 psABI would be good enough.
Otherwise you better overalign the object with alignas to avoid a (possibly software-emulated) misaligned load.

> Which is it? Does it align to 8bytes or 64bytes?

Whatever the ABI says.

> And those that says that somehow on some compilers that's what it does, despite the fact that the alignment is _BitInt is not defined, it means that it may work anyhow in practice but only because the compiler took an optimization path that was never guaranteed to be there in the first place.

I have no idea why you're under the impression that it's not defined.
It's not any more or less defined than the alignment of int, which is whatever the ABI says.