On Monday, 30 August 2021 11:48:46 PDT Ville Voutilainen wrote:
> In other words, you have a claim, fine. Substantiate it, and I'm all
> ears, and so are, ostensibly,
> many other people.

I've already mentioned, earlier in this thread, that the Intel Software
Optimisation Manual recommends against looping on modifying operations.

> In x86 speak, you want to loop without LOCK (usually on a CMP + PAUSE) so
> you loop while the cacheline is retained in shared mode. See the Intel
> Software Optimisation Manual section 11.4.2 "Synchronization for Short
> Periods".

Anyway, I am not against slim mutexes nor am I saying there's a specific order
that is required of the features.

I am saying there is a problem. We've already got two examples of improperly-
written looping in this thread alone.

>From my point of view, there's no need for more evidence. We just need a paper
proposing the proper spinlock class.

-- 
Thiago Macieira - thiago (AT) macieira.info - thiago (AT) kde.org
   Software Architect - Intel DPG Cloud Engineering